Description
This topic deals with architecture design and compilation for high performance parallel machines. Instruction-level parallelism and increasingly multi-cores are present in most contemporary processors. The area of interest ranges from large scale parallel machines to general-purpose platforms to specialised hardware designs such as graphic coprocessors or low-power embedded systems. On the compilation side areas of interest include programming language aspects, program analysis, program transformation systems for optimization of resource utilization, auto-parallelsation, the interaction between compiler and hardware/operating system, runtime systems, and feedback-oriented and adaptive/machine learning compilation. On the architecture sided the scope of this topic includes parallel computer architectures, processor architecture (architecture and microarchitecture), the impact of emerging microprocessor architectures on parallel computer architectures, innovative memory designs, multi-threading, and the impact of emerging applications on parallel computer architecture design.
Focus
Organization
Global Chair | Local Chair |
---|---|
Mike O' Boyle School of Informatics Institute for Computing Systems Architecture King's Buildings Mayfield Road Edinburgh, United Kingdom |
François Bodin IRISA/IFSIC University of Rennes Rennes, France |
Vice Chair | Vice Chair |
Lucian Vintan University of Sibiu Computer Science & Engineering Department Sibiu, Romania | Jose Gonzalez Intel Barcelona Research Center Barcelona, Spain |